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S pe c if icat io n , V 2. 5 , A pr il 20 0 4
TUA6034, TUA6036
3- Ban d Di g i tal T V / S et- T op -B ox Tu ne r IC TA IF UN Ver s i on 2 .5
W i re l e s s C o m mu n i c a t i o n
Never
stop
thinking.
Edition 2004-04-28 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 Munchen, Germany (c) Infineon Technologies AG 2004. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or the Infineon Technologies Companies and our Infineon Technologies Representatives worldwide (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
S pe c if icat io n , V 2. 5 , A pr il 20 0 4
TUA6034, TUA6036
3- Ban d Di g i tal T V / S et- T op -B ox Tu ne r IC TA IF UN Ver s i on 2 .5
W i re l e s s C o m mu n i c a t i o n
Never
stop
thinking.
TUA6034, TUA6036 Revision History: Page Page (in previous (in current Version) Version) 2004-04-28 Subjects (major changes since last revision) V 2.5
Revision History: Target Spec. V1.1, January 2001 Data Sheet: Target Spec. V1.0, November 2000 div. 5-2 div. 5-2 in extended mode reference division ratio 80 replaced by 32 new definition of thermal properties
Revision History: Current Version:Preliminary Spec. V1.2, April 2001 Data Sheet: Target Spec. V1.1, January 2001 div. div. div. div. status: preliminary bug fixes: TSSOP and VQFN pinning. Changes: application focus to digital applications, tbd's replaced by values phase noise values added diagrams added
5-10, 5-11 5-21
5-10, 5-11 5-21
Revision History: Current Version:Preliminary Spec. V1.3, July 2001 Data Sheet: Target Spec. V1.2, April 2001 div. 5-5 5-7 5-12 5-15 div 5-5 5-7 5-12 5-15 Stand-by mode added Crystal Oscillator: Input impedances added Output leakage current replaced by port output voltage Symbol for port output saturation voltages changed AGC source current 2 and AGC output voltage changed Definition for MA1= 0 and MA0 = 1 changed
Revision History: Current Version:Preliminary Spec. V1.4, October 2001 Data Sheet: Target Spec. V1.3, July 2001 3-5, 3-7 5-5 5-10, 5-11 5-12 3-5, 3-7 5-5 5-10, 5-11 5-12 PNP ports: Pull-down resistors added MID band: IVCC corrected Phase Noise: new values AGC output voltage changed
Revision History: Current Version:Preliminary Spec. V2.0, May2002 Data Sheet: Target Spec. V1.4, October 2001 all all preliminary and confidential deleted
TUA6034, TUA6036 Revision History: div div 2004-04-28 tbf's replaced, ISDB-T application deleted V 2.5
Revision History: Current Version:Preliminary Spec. V2.1, August 2002 Data Sheet: Target Spec. V2.0, May 2002 5-6 5-6 Bus output SDA, Low-level output voltage, IOL = 6 mA at 400 kHz deleted
Revision History: Current Version:Preliminary Spec. V2.2, December 2002 Data Sheet: Target Spec. V2.1, August 2002 3-2 ff 3-2 ff Pinning of TUA6034-V changed
Revision History: Current Version: V2.3, February 2003 Data Sheet: Target Spec. V2.2, December 2002 all all Mirrored version TUA6036 added
Revision History: Current Version V2.4, March 2003 Data Sheet: Target Spec. V2.3, February 2003 2-10, 4-29, 4-30 5-34 5-38, 5-39, 5-40 2-10, 4-29, 4-30 5-34 5-38, 5-39, 5-40 Frequencies corrected
Ambient temperature extended Input IP2,Input IIP3, Output voltage causing 1 dB compression added, test frequencies changed
Revision History: Current Version: V2.5, April 2004 Data Sheet: Target Spec. V2.4, March 2003 5-35 div. n.a. all 33 div. 28 all Crystal oscillation frequency added TUA6034-V in VQFN-48 package ISDB-T application added New Infineon template (A5 letter page size)
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TUA6034, TUA6036
Product Info General Description The TUA6034, TUA6036 'TAIFUN' device combines a mixer-oscillator block with a digitally programmable phase locked loop (PLL) for use in TV and VCR tuners and in settop-box applications. Features General * * Suitable for PAL, NTSC, DVB and ATSC Wideband AGC detector for internal tuner AGC - 5 programmable take-over points - 2 programmable time constants Low phase noise Full ESD protection High impedance mixer input (common emitter) for LOW band Low impedance mixer input (common base) for MID band Low impedance mixer input (common base) for HIGH band 2 pin oscillator for LOW band 2 pin oscillator for MID band 4 pin oscillator for HIGH band Symmetrical IF preamplifier with low output impedance able to drive a compensated SAW filter (500//40pF) PLL * * * * * * * * * * 4 independent I2C addresses I2C bus protocol compatible with 3.3 V and 5V micro-controllers up to 400 kHz High voltage VCO tuning output 4 PNP ports 1 NPN port/ADC input Internal LOW/MID/HIGH band switch Stand-by mode Lock-in flag 6 programmable reference divider ratios (24, 28, 32, 64, 80, 128) 4 programmable charge pump currents
* * * * * * * * *
Mixer/Oscillator
Application * The IC is suitable for PAL, NTSC, DVB-C, DVB-T, ISDB-T and ATSC tuners. The focus is on digital terrestrial.
IF-Amplifier The AGC stage makes the tuner AGC independent of the Video-IF AGC.
Ordering Information
Type TUA6034-T TUA6036-T TUA6034-V
Specification
Ordering Code Q67034-H0009 Q67037-A0012 Q67034-H0008
6
Package TSSOP-38 TSSOP-38 VQFN-48
V 2.5, 2004-04-28
TUA6034, TUA6036
Table of Contents 1 1.1 1.1.1 1.1.2 1.1.3 1.1.4 1.2 2 2.1 2.2 2.3 2.4 2.4.1 2.4.2 2.4.3 2.4.4 3 3.1 3.2 3.3 4 4.1 4.1.1 4.1.2 4.1.3 4.2 4.3 4.4 4.4.1 4.4.2 4.4.3 4.4.4 4.4.5 4.4.6 4.5 4.5.1 4.5.2 4.5.3 4.5.4 4.5.5 4.5.6
Page
Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Mixer/Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 IF-Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definition and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mixer-Oscillator block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PLL block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2C-Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application Circuit for ATSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application Circuit for DVB-T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application Circuit for ISDB-T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2C Bus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input admittance (S11) of the LOW band mixer (40 to 150 MHz) . . . . . Input impedance (S11) of the MID band mixer (150 to 455 MHz) . . . . . Input impedance (S11) of the HIGH band mixer (450 to 865 MHz) . . . . Output admittance (S22) of the of the mixers (30 to 50 MHz) . . . . . . . . Input impedance (S11) of the IF amplifier (30 to 50 MHz) . . . . . . . . . . . Output impedance (S22) of the IF amplifier (30 to 50 MHz) . . . . . . . . . Measurement Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gain (GV) measurement in LOW band . . . . . . . . . . . . . . . . . . . . . . . . . Gain (GV) measurement in MID and HIGH bands . . . . . . . . . . . . . . . . Matching circuit for optimum noise figure in LOW band . . . . . . . . . . . . Noise figure (NF) measurement in LOW band . . . . . . . . . . . . . . . . . . . Noise figure (NF) measurement in MID and HIGH bands . . . . . . . . . . . Cross modulation measurement in LOW band . . . . . . . . . . . . . . . . . . .
7
12 12 15 21 24 24 24 25 25 27 27 28 29 30 30 30 32 33 46 51 52 52 52 53 53 54 54 55 55 55 56 56 57 57
Specification
V 2.5, 2004-04-28
4.5.7 4.5.8 5 5.1 5.2
Cross modulation measurement in MID and HIGH bands . . . . . . . . . . . 58 Ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 TSSOP-38 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 VQFN-48 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Specification
8
V 2.5, 2004-04-28
TUA6034, TUA6036
Product Description
1
Product Description
The TUA6034, TUA6036 'TAIFUN' device combines a mixer-oscillator block with a digitally programmable phase locked loop (PLL) for use in TV and VCR tuners and in settop-box applications. The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the LOW and the MID band, one 4-pin symmetrical oscillator for the HIGH band, an IF amplifier, a reference voltage, and a band switch. The PLL block with four independently selectable chip addresses forms a digitally programmable phase locked loop. With a 4 MHz quartz crystal, the PLL permits precise setting of the frequency of the tuner oscillator up to 1024 MHz in increments of 31.25, 50, 62.5, 125, 142.86 or 166.7 kHz. The tuning process is controlled by a microprocessor via an I2C bus. The device has 5 output ports, one of them (P4) can also be used as ADC input port. A flag is set when the loop is locked. The lock flag can be read by the processor via the I2C bus.
1.1 1.1.1
* *
Features General
* *
Suitable for PAL, NTSC, DVB, ISDB-T and ATSC Wideband AGC detector for internal tuner AGC - 5 programmable take-over points - 2 programmable time constants Low phase noise Full ESD protection
1.1.2
* * * * * *
Mixer/Oscillator
High impedance mixer input (common emitter) for LOW band Low impedance mixer input (common base) for MID band Low impedance mixer input (common base) for HIGH band 2 pin oscillator for LOW band 2 pin oscillator for MID band 4 pin oscillator for HIGH band
1.1.3
*
IF-Amplifier
Symmetrical IF preamplifier with low output impedance able to drive a compensated SAW filter (500 //40 pF)
Specification
9
V 2.5, 2004-04-28
TUA6034, TUA6036
Product Description
1.1.4
* * * * * * * * * *
PLL
4 independent I2C addresses I2C bus protocol compatible with 3.3 V and 5V micro-controllers up to 400 kHz High voltage VCO tuning output 4 PNP ports 1 NPN port/ADC input Stand-by mode Internal LOW/MID/HIGH band switch Lock-in flag 6 programmable reference divider ratios (24, 28, 32, 64, 80, 128) 4 programmable charge pump currents
1.2
* *
Application
The IC is suitable for PAL, NTSC, DVB-C, DVB-T, ISDB-T and ATSC tuners. The focus is on digital terrestrial. The AGC stage makes the tuner AGC independent of the Video-IF AGC.
Recommended band limits in MHz: Table 1 Band LOW MID HIGH ATSC tuners RF input min 55.25 163.25 457.25 max 157.25 451.25 861.25 min 101 201 503 Oscillator max 203 479 907
Table 2 Band LOW MID HIGH
DVB-T tuners RF input min 48.25 161.25 447.25 max 154.25 439.25 863.25 min 87.15 200.15 486.15 Oscillator max 193.15 478.15 902.15
Specification
10
V 2.5, 2004-04-28
TUA6034, TUA6036
Product Description Table 3 Band LOW MID HIGH ISDB-T tuners RF input min 93 173 473 max 167 467 767 min 150 230 530 Oscillator max 224 524 824
Note: Tuning margin of 3 MHz not included.
Specification
11
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description
2
2.1
Functional Description
Pin Configuration
OSCLOWOUT OSCLOWIN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT OSCHIGHIN VCC IFGND IFOUT IFOUT PLLGND VT CP P4/ADC XTAL XTAL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20
HIGHIN HIGHIN MIDIN MIDIN LOWIN RFGND MIXOUT MIXOUT IFIN IFIN P2 AGC GND SDA SCL AS P1 P0 P3
TUA6034-T TSSOP-38 package
Figure 1
Pin Configuration TUA6034 in TSSOP-38 Package
Specification
12
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description
HIGHIN HIGHIN MIDIN MIDIN LOWIN RFGND MIXOUT MIXOUT IFIN IFIN P2 AGC GND SDA SCL AS P1 P0 P3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20
OSCLOWOUT OSCLOWIN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT OSCHIGHIN VCC IFGND IFOUT IFOUT PLLGND VT CP P4/ADC XTAL XTAL
TUA6036-T TSSOP-38 package
Figure 2
Pin Configuration TUA6036 in TSSOP-38 Package
Specification
13
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description
43 OSCLOWOUT
47 OSCMIDOUT
44 OSCLOWIN
46 OSCMIDIN
45 OSCGND
41 HIGHIN
40 HIGHIN
n.c. 1 n.c. 2 OSCHIGHIN 3 OSCHIGHOUT 4 OSCHIGHOUT 5 OSCHIGHIN 6 VCC 7 IFGND 8 IFOUT 9 IFOUT 10 PLLGND 11 VT 12 CP 15 P4/ADC 16 n.c. 17 XTAL 18 XTAL 19 P3 20 P0 21 P1 22 AS 23 n.c. 24 n.c. 13 n.c. 14 TUA6034-V VQFN-48 package
37 LOWIN 36 n.c. 35 RFGND 34 MIXOUT 33 MIXOUT 32 IFIN 31 IFIN 30 n.c. 29 P2 28 AGC 27 GND 26 SDA 25 SCL
V 2.5, 2004-04-28
39 MIDIN
Figure 3
Pin Configuration TUA6034 in VQFN-48 Package
Specification
14
38 MIDIN
48 n.c.
42 n.c.
TUA6034, TUA6036
Functional Description
2.2
Table 4 Pin No.
TSS VQ OP- FN38 48
Pin Definition and Functions
Pin Defintion and Functions Symbol Equivalent I/O Schematic pin designation in parenthesis refer to VQFN-48 package OSCLOWOUT OSCLOWIN Average DC voltage LOW MID HIGH
1/38 43 2/37 44
2.1 V 1.45 V
1 (43) 2 (44)
3/36 45 4/35 46 5/34 47
OSCGND OSCMIDIN OSCMIDOUT
oscillator ground
0.0 V
0.0 V 1.45 V 2.1 V
0.0 V
5 (47) 4 (46)
Specification
15
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description Pin No.
TSS VQ OP- FN38 48
Symbol
Equivalent I/O Schematic pin designation in parenthesis refer to VQFN-48 package
Average DC voltage LOW MID HIGH
6/33 3 7/32 4 8/31 5 9/30 6
OSCHIGHIN OSCHIGHOUT OSCHIGHOUT OSCHIGHIN
7 (4) 6 (3) 8 (5) 9 (6)
1.5 V 2.4 V 2.4 V 1.5 V
10/ 29 11/ 28 12/ 27 13/ 26
7 8 9 10
VCC IFGND IFOUT IFOUT
supply voltage IF ground
5.0 V 0.0 V 2.2 V 2.2 V
5.0 V 0.0 V 2.2 V 2.2 V
5.0 V 0.0 V 2.2 V 2.2 V
12 (9)
13 (10) 0.0 V VT 2.0 V 0.0 V VT 2.0 V 0.0 V VT 2.0 V
14/ 25 15/ 24 16/ 23
11 12 15
PLLGND VT CP
PLL ground
16 (15) 15 (12)
Specification
16
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description Pin No.
TSS VQ OP- FN38 48
Symbol
Equivalent I/O Schematic pin designation in parenthesis refer to VQFN-48 package
Average DC voltage LOW MID HIGH
17/ 22
16
P4/ADC
5 V or VCE
5 V or VCE
5 V or VCE
17 (16)
18/ 21 19/ 20
18 19
XTAL XTAL
18 (18) 19 (19)
1.7 V 1.7 V
1.7 V 1.7 V
1.7 V 1.7 V
20/ 19 21/ 18 22/ 17
20
P3
0 V or VCC VCE 20 (20) or 21 (21) or 22 (22) VCC VCE n.a.
0 V or VCC VCE n.a. VCC VCE
0 V or VCC VCE n.a. n.a.
21 22
P0 P1
Specification
17
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description Pin No.
TSS VQ OP- FN38 48
Symbol
Equivalent I/O Schematic pin designation in parenthesis refer to VQFN-48 package
Average DC voltage LOW MID HIGH
23/ 16
23
AS
n.a.
n.a.
n.a.
23 (23)
24/ 15
25
SCL
n.a.
n.a.
n.a.
24 (25)
25/ 14
26
SDA
n.a
n.a
n.a
25 (26)
26/ 13
27
GND
ground
0.0
0.0
0.0
Specification
18
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description Pin No.
TSS VQ OP- FN38 48
Symbol
Equivalent I/O Schematic pin designation in parenthesis refer to VQFN-48 package
Average DC voltage LOW MID HIGH
27/ 12
28
AGC
3.5 V
3.5 V
3.5 V
27 (28)
28/ 11
29
P2
n.a.
n.a.
0 V or VCC VCE
28 (29)
29/ 10
31
IFIN IFIN
29 (31) 30 (32)
n.a. n.a.
n.a. n.a.
n.a. n.a.
30/9 32
31/8 33
MIXOUT
4.0 V
4.0 V
4.0 V
32/7 34
MIXOUT
31 (33)
32 (34)
4.0 V
4.0 V
4.0 V
Oscillator
33/6 35
RFGND
RF ground
0.0 V
0.0 V
0.0 V
Specification
19
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description Pin No.
TSS VQ OP- FN38 48
Symbol
Equivalent I/O Schematic pin designation in parenthesis refer to VQFN-48 package
Average DC voltage LOW MID HIGH
34/5 37
LOWIN
1.9 V
34 (37)
35/4 38
MIDIN
0.75 V
35 (38)
36 (39) 0.75 V
36/3 39
MIDIN
37/2 40 38/1 41
HIGHIN HIGHIN
37 (40) 38 (41)
0.75 V 0.75 V
Specification
20
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description
2.3
Functional Block Diagram
OSCLOWOUT OSCLOWIN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT OSCHIGHIN VCC IFGND IFOUT IFOUT PLLGND VT CP P4/ADC XTAL XTAL
1 2 3 4 5
P1 P1
38 Oscillator LOW Mixer HIGH RF Input HIGH
P1 P0.P1 P0.P1
HIGHIN HIGHIN MIDIN MIDIN LOWIN RFGND MIXOUT MIXOUT IFIN IFIN P2 AGC GND SDA SCL AS P1 P0 P3
37 36 35 34 33
P0
Oscillator MID
Mixer MID
RF Input MID
6 7 8 9 10 11 12 13
f div VCC ATC
Oscillator HIGH
Mixer LOW
RF Input LOW
32 31 30 29
P0.P1
P0
SAW Filter Driver
P0
AGC Detector
AGC
28 27
Prog. Divider
FL
I 2C Bus
Lock Detector
26 25 24 23 22
14 15 16 17 18 19 Crystal Oscillator Reference Divider ADC Charge Pump Phase/ Freq Comp
CP, OS f ref
PORTS
21 20
Figure 4
Block Diagram TUA6034 in TSSOP-38 Package
Specification
21
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description
HIGHIN HIGHIN MIDIN MIDIN LOWIN RFGND MIXOUT MIXOUT IFIN IFIN P2 AGC GND SDA SCL AS P1 P0 P3
1 2 3 4 5
P1 P1
38 RF Input HIGH
P1 P0.P1 P0.P1
OSCLOWOUT OSCLOWIN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT OSCHIGHIN VCC IFGND IFOUT IFOUT PLLGND VT CP P4/ADC XTAL XTAL
Mixer HIGH
Oscillator LOW
37 36 35 34 33
P0
RF Input MID
Mixer MID
Oscillator MID
6 7 8 9 10 11
AGC
RF Input LOW
Mixer LOW
Oscillator HIGH
32 31 30
VCC
P0
P0
SAW Filter Driver
P0.P1
29 28
AGC Detector
ATC
12
I 2C Bus
FL
Prog. Divider Lock Detector
27 26
13 14 15 16 17 18 19 ADC
f div
25 Phase/ Freq Comp
CP, OS
PORTS
f ref
Charge Pump
24 23 22
Reference Divider
Crystal Oscillator
21 20
Figure 5
Block Diagram TUA6036 in TSSOP-38 Package
Specification
22
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description
OSCLOWOUT
OSCMIDOUT
OSCLOWIN
OSCMIDIN
OSCGND
HIGHIN
HIGHIN
48
47
46
45
44
43
42
41
40
39
38
n.c. 1 Oscillator LOW
P0 P0.P1
37
36
LOWIN
MIDIN
MIDIN
n.c.
n.c.
n.c.
n.c. 2
Mixer HIGH
RF Input HIGH
P1 P0.P1
35
RFGND
OSCHIGHIN
3
Oscillator MID
P1 P1
Mixer MID
RF Input MID
34
MIXOUT
OSCHIGHOUT OSCHIGHOUT
4
33
MIXOUT
5
Oscillator HIGH
P0.P1 P0
Mixer LOW
RF Input LOW
P0
32
IFIN
OSCHIGHIN
6
31
IFIN
VCC 7
VCC
SAW Filter Driver Lock Detector Prog. Divider AGC Detector
30
n.c.
IFGND
8
AGC FL
29
P2
I 2C Bus
28
IFOUT
9
f ref
f div
AGC
IFOUT 10
Phase/ Freq Comp Charge Pump
CP, OS
Reference Divider
PORTS
27
GND
PLLGND 11
Crystal Oscillator
26
SDA
ADC
25
VT 12
13 14 15 16 17 18 19 20 21 22 23 24
SCL
n.c.
n.c.
n.c.
P4/ADC
XTAL
XTAL
Figure 6
Block Diagram TUA6034 in VQFN-48 package
Specification
23
n.c.
CP
AS
P3
P0
P1
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description
2.4 2.4.1
Circuit Description Mixer-Oscillator block
The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the LOW and the MID band, one 4-pin symmetrical oscillator for the HIGH band, an IF amplifier, a reference voltage, and a band switch. Filters between tuner input and IC separate the TV frequency signals into three bands. The band switching in the tuner front-end is done by using three PNP port outputs. In the selected band the signal passes a tuner input stage with a MOSFET amplifier, a doubletuned bandpass filter and is then fed to the mixer input of the IC which has in case of LOW band a high-impedance input and in case of MID or HIGH band a low-impedance input. The input signal is mixed there with the signal from the activated on chip oscillator to the IF frequency. The IF is filtered by means of an IF filter in between the 2 mixer output pins and the 2 input pins of the following IF amplifier. The IF amplifier has a low output impedance to drive the SAW filter directly.
2.4.2
PLL block
The oscillator signal is internally DC-coupled as a differential signal to the programmable divider inputs. The signal subsequently passes through a programmable divider with ratio N = 256 through 32767 and is then compared in a digital frequency/phase detector with a reference frequency fref = 31.25, 50, 62.5, 125, 142.86 or 166.67 kHz. This frequency is derived from a balanced, low-impedance 4 MHz crystal oscillator (pins XTAL, XTAL) divided by 128, 80, 64, 32, 28 or 24. The reference frequencies will be different with a quartz other than 4 MHz. The phase detector has two outputs which drive four current sources of a charge pump. If the negative edge of the divided VCO signal appears prior to the negative edge of the reference signal, the positive current source pulses for the duration of the phase difference. In the reverse case the negative current source pulses. If the two signals are in phase, the charge pump output (CP) goes into the high-impedance state (PLL is locked). An active low-pass filter integrates the current pulses to generate the tuning voltage for the VCO (internal amplifier, external pull-up resistor at VT and external RC circuitry). The charge pump output is also switched into the high-impedance state if the control bits T2, T1, T0 = 0, 1, 0. Here it should be noted, however, that the tuning voltage can alter over a long period in the high impedance state as a result of self discharge in the peripheral circuity. VT may be switched off by the control bit OS to allow external adjustments.
Specification
24
V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description If the VCO is not oscillating the PLL locks to a tuning voltage of 33V (VTH). By means of control bits CP, T0, T1 and T2 the pump current can be switched between four values by software. This programmability permits alteration of the control response of the PLL in the locked-in state. In this way different VCO gains can be compensated, for example. The software controlled ports P0 to P4 are general purpose open-collector outputs. The test bits T2, T1, T0 =1, 0, 0 switch the test signals fdiv (divided input signal) and fref (i.e .4 MHz / 64) to P0 and P1 respectively. The lock detector resets the lock flag FL if the width of the charge pump current pulses is greater than the period of the crystal oscillator (i.e. 250 ns). Hence, if FL = 1, the maximum deviation of the input frequency from the programmed frequency is given by f = IP (KVCO / fXTAL) (C1+C2) / (C1C2) where IP is the charge pump current, KVCO the VCO gain, fXtal the crystal oscillator frequency and C1, C2 the capacitances in the loop filter (see Chapter 3). As the charge pump pulses at i.e. 62.5 kHz (= fref), it takes a maximum of 16 s for FL to be reset after the loop has lost lock state. Once FL has been reset, it is set only if the charge pump pulse width is less than 250 ns for eight consecutive fref periods. Therefore it takes between 128 and 144 s for FL to be set after the loop regains lock.
2.4.3
AGC
The wide band AGC stage detects the level of the IF output signal and generates an AGC voltage for gain control of the tuners input transistors. The AGC take-over and the time constant are selectable by the I2C bus.
2.4.4
I2C-Bus Interface
Data is exchanged between the processor and the PLL via the I2C bus. The clock is generated by the processor (input SCL). Pin SDA functions as an input or output depending on the direction of the data (open collector, external pull-up resistor). Both inputs have a hysteresis and a low-pass characteristic, which enhance the noise immunity of the I2C bus. The data from the processor pass through an I2C bus controller. Depending on their function the data are subsequently stored in registers. If the bus is free, both lines will be in the marking state (SDA, SCL are high). Each telegram begins with the start condition
Specification 25 V 2.5, 2004-04-28
TUA6034, TUA6036
Functional Description and ends with the stop condition. Start condition: SDA goes low, while SCL remains high. Stop condition: SDA goes high while SCL remains high. All further information transfer takes place during SCL = low, and the data is forwarded to the control logic on the positive clock edge. The table 'Bit Allocation' (see Table 8 on page 46) should be referred to for the following description. All telegrams are transmitted byte-by-byte, followed by a ninth clock pulse, during which the control logic returns the SDA line to low (acknowledge condition). The first byte is comprised of seven address bits. These are used by the processor to select the PLL from several peripheral components (address select). The LSB bit (R/W) determines whether data are written into (R/W = 0) or read from (R/W = 1) the PLL. In the data portion of the telegram during a WRITE operation, the MSB bit of the first or third data byte determines whether a divider ratio or control information is to follow. In each case the second byte of the same data type has to follow the first byte. Appropriate setting of the test bits will decide whether the band-switch byte or the auxiliary byte will be transmitted (see Table 11 on page 47). If the address byte indicates a READ operation, the PLL generates an acknowledge and then shifts out the status byte onto the SDA line. If the processor generates an acknowledge, a further status byte is output; otherwise the data line is released to allow the processor to generate a stop condition. The status word consists of three bits from the A/D converter, the lock flag and the power-on flag. Four different chip addresses can be set by an appropriate DC level at pin AS (see Table 10 on page 47). While the supply voltage is applied, a power-on reset circuit prevents the PLL from setting the SDA line to low, which would block the bus. The power-on reset flag POR is set at power-on and if VCC falls below 3.2 V. It will be reset at the end of a READ operation.
Specification
26
V 2.5, 2004-04-28
TUA6034, TUA6036
Applications
3
3.1
Applications
Application Circuit for ATSC
2k7
BB659C
2p2 1 2p7 2
22p
OSCLOWOUT OSCLOWIN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT
HIGHIN HIGHIN MID MIDIN LOWIN
100p 12 L1
38
2p2 22p
balun 1:1
HIGH Input TOKO B4F 617DB-1023 MID Input TOKO B4F 617DB-1023 1n LOW Input
37
2k7
BB659C 82p
3 1p5 4 1p2 5 1p2 6 1p2
36
1n
balun 1:1
35
1n
8R2 1k8
15p
L2
34
RFGND MIXOUT MIXOUT
33 68p
47n
BB565
L3
7 1p2 8
32
31
1k8
TUA6034-T
1p2 9
L4
OSCHIGHIN VCC IFGND IFOUT IFOUT PLLGND VT CP P4/ADC XTAL XTAL
IFIN
30 68p
560 +5V 100n IFOUT
4n7 10 11
IFIN P2 AGC GND SDA SCL AS P1 P0 P3
29 28 150n 27 4n7 AGC P2
transformer 2:10
C3 22n
12p
12
TOKO 7KL600 GCS-A1010DX R2 560 C2 1n5
13
26 SDA 220 100p 24 23 4n7 22 4n7 21 4n7 20 4n7 220 100p AS SCL
14
25
C1 15 100n 16
+ 33 V 33k P4/ ADC 100n
R1 15k 39p 4 MHz
17 4n7
P1
18 39p 19
P0 P3
Recommended band limits for ATSC in MHz RF input Oscillator
LOW MID HIGH min 55.25 163.25 457.25 max 157.25 451.25 861.25 min 101 201 503 max 203 479 907 L1 L2 L3 L4
Coils for ATSC application turns diam. wire diam.
8.5 2.5 1.5 12.5 3.2 mm 3 mm 2.4 mm 3.5 mm 0.5 mm 0.5 mm 0.5 mm 0.3 mm
Figure 7
Application Circuit for ATSC
Remark: TUA 6036 has reversed pinning.
Specification 27 V 2.5, 2004-04-28
TUA6034, TUA6036
Applications
3.2
Application Circuit for DVB-T
2k7
BB659C
2p2 1 2p7 2
22p
OSCLOWOUT OSCLOWIN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT
HIGHIN HIGHIN MID MIDIN LOWIN RFGND MIXOUT
100p 12 L1
38
2p2 22p
balun 1:1
HIGH Input TOKO B4F 617DB-1023 MID Input TOKO B4F 617DB-1023 1n LOW Input
37
2k7
BB659C
3 1p5 4 1p2 5 1p2 6 1p2
36
1n
balun 1:1
82p 8R2 1k8 L2
35 34
1n
15p
33 100p
BB565
L3
7 1p2
32
1k5 22p
L4 330n
100p 22p
1k8
1p2 9 4n7 10
TUA6034-T
8
MIXOUT IFIN
31
OSCHIGHIN VCC IFGND IFOUT IFOUT PLLGND VT CP P4/ADC XTAL XTAL
30
47p
L5 330n
IFIN P2 AGC GND SDA SCL AS P1 P0 P3
+5V 100n IFOUT
29 P2 150n 27 4n7 AGC
11
28
transformer 2:10
C3 22n TOKO 7KL600 GCS-A1010DX R2 220 C2 100p
12p
12
13
26 SDA 220 100p SCL 220 100p 23 4n7 22 4n7 21 4n7 20 4n7 AS
14 15
25 24
C1 4n7
+ 33 V 33k P4/ ADC 100n
R1 68k 39p 4 MHz
16
17 4n7
P1 P0
18 39p 19
P3
Recommended band limits for DVB-T in MHz RF input Oscillator
LOW MID HIGH min 48.25 161.25 447.25 max 154.25 439.25 863.25 min 87.15 200.15 486.15 max 193.15 478.15 902.15 L1 L2 L3 L4, L5
Coils for DVB-T application turns diam. wire diam.
8.5 2.5 1.5 SMD 3.2 mm 3 mm 2.4 mm 0805 0.5 mm 0.5 mm 0.5 mm 330n
SMD = Surface Mounted Device
Figure 8
Application Circuit for DVB-T
Remark: TUA 6036 has reversed pinning.
Specification
28
V 2.5, 2004-04-28
TUA6034, TUA6036
Applications
3.3
Application Circuit for ISDB-T
2k7
BB659C
2p2 1 2p7 2
22p
OSCLOWOUT OSCLOWIN OSCGND OSCMIDIN OSCMIDOUT OSCHIGHIN OSCHIGHOUT OSCHIGHOUT
HIGHIN HIGHIN MID MIDIN LOWIN
100p 12 L1
38
2p2 22p
balun 1:1
HIGH Input TOKO B4F 617DB-1023 MID Input TOKO B4F 617DB-1023 1n LOW Input
37
2k7
BB659C 82p
3 1p5 4 1p2 5 1p2 6 1p2
36
1n
balun 1:1
35
1n
8R2
15p
L2
34
RFGND MIXOUT MIXOUT
1k8
33 56p
BB555
L3
7 1p2 1p2 9 4n7
32
1k5
L4 220n 12p L5 220n
56p
1k8
TUA6034-T
8
31
12p 30p
OSCHIGHIN VCC IFGND IFOUT IFOUT PLLGND VT CP P4/ADC XTAL XTAL
IFIN
30
+5V 100n IFOUT
10 11
IFIN P2 AGC GND SDA SCL AS P1 P0 P3
29 28 150n 27 4n7 AGC P2
transformer 2:10
C3 22n
12p
12
TOKO 7KL600 GCS-A1010DX R2 100 C2 270p C1 6n8
13
26 SDA 220 100p 24 23 4n7 22 4n7 21 4n7 20 4n7 220 100p AS SCL
14
25
15 16
+ 33 V 33k P4/ ADC 100n
R1 33k
17 4n7 4 MHz 39p 18 39p 19
P1
P0 P3
Recommended band limits for ISDB-T in MHz RF input Oscillator
LOW MID HIGH min 93 173 473 max 167 467 767 min 150 230 530 max 224 524 824 L1 L2 L3 L4, L5
Coils for ISDB-T application turns diam. wire diam.
8.5 2.5 1.5 SMD 3.2 mm 3 mm 2.4 mm 0805 0.5 mm 0.5 mm 0.5 mm 220n
SMD = Surface Mounted Device
Figure 9
Application Circuit for ISDB-T
Remark: TUA 6036 has reversed pinning.
Specification
29
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
4
4.1 4.1.1
Reference
Electrical Data Absolute Maximum Ratings
Attention: The maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC will result. Table 5 # 1. 2. 3. 4. 5. Absolute Maximum Ratings Symbol VCC TA TJ TStg TJC -40 Limit Values min. Supply voltage Ambient temperature Junction temperature Storage temperature Temperature difference junction to case3) CP Crystal oscillator pin XTAL -0.3 -40 max. 6 TAmax2) +125 +125 2 V C C C K Unit Remarks
Parameter1)
PLL 6. 7. 8. 9. VCP ICP VQ IQ VSDA ISDA(L) VSCL VAS VVT VP4 -0.3 -0.3 -0.3 -0.3 -5 -0.3 6 10 6 6 35 6 -0.3 3 1 6 V mA V mA V mA V V V V open collector open collector
10. Bus input/output SDA 11. Bus output current SDA 12. Bus input SCL 13. Chip address switch AS 14. VCO tuning output (loop filter) 15. NPN port output voltage of P4
Specification
30
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter1) Symbol IP4(L) VP4/ADC IP4/ADC(L) VP0, 1, 2, 3 Limit Values min. 16. NPN port output current of P4 17. P4/ADC input/output voltage 18. NPN port output current of P4 19. PNP port output voltage of P0, P1, P2, P3 20. PNP port output current of P1 21. PNP port output current of P0 22. PNP port output current of P2, P3 23. 7 Total port output current of PNP ports Mixer-Oscillator 24. Mix inputs LOW band 25. Mix inputs MID/HIGH 26. band 27. VCO base voltage VLOW VMID/HIGH IMID/HIGH VB -5 -0.3 -0.3 3 2 6 3 V V mA V LOW, MID and HIGH band oscillators LOW, MID and HIGH band oscillators -1 -0.3 -1 -0.3 max. 10 6 10 6 mA V mA V open collector, tmax = 0.1 s at 5.5 V open collector open collector, tmax = 0.1 s at 5.5 V Unit Remarks
IP1(L) IP0(L) IP2, 3(L) IP(L)
+1 +1 +1
-25 -10 -5 -40
mA mA mA mA
open collector, tmax = 0.1 s at 5.5 V open collector, tmax = 0.1 s at 5.5 V open collector, tmax = 0.1 s at 5.5 V tmax = 0.1 s at 5.5 V
28. VCO collector voltage
VC
6
V
ESD-Protection4) 29. all pins VESD 2 kV
1) All values are referred to ground (pin), unless stated otherwise. Currents with a positive sign flow into the pin and currents with a negative sign flow out of pin.
Specification
31
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
2) The maximum ambient temperature depends on the mounting conditions of the package. Any application mounting must guarantee not to exceed the maximum junction temperature of 125 C. As reference the temperature difference junction to case is given. 3) Referred to top center of package. 4) According to EIA/JESD22-A114-B (HBM incircuit test), as a single device incircuit contact discharge test.
4.1.2
Table 6 # 1. 2. 3. 4.
Operating Range
Operating Range Symbol VCC N fMIXV fMIXU Limit Values min. Supply voltage Programmable divider factor LOW mixer input frequency range MID and HIGH band mixer input frequency range LOW oscillator frequency range MID band oscillator frequency range HIGH band oscillator frequency range Ambient temperature +4.5 256 30 130 max. +5.5 32767 200 900 MHz MHz V Unit Remarks
Parameter
5. 6. 7. 8.
fOH fOU fOU TA
65 165 400 -20
250 530 950 TAmax1)
MHz MHz MHz C
1) see 4.1.1 Absolute Maximum Ratings on page 30.
Specification
32
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
4.1.3
Table 7 #
AC/DC Characteristics
AC/DC Characteristics, TA = 25C, VCC = 5V Symbol Limit Values min. typ. 5 74 74 71 20 max. 5.5 89 89 85 V mA mA mA mA LOW band MID band HIGH band P0, P1 = 1 Unit Test Conditions
Parameter
Supply 1. 2. 3. 4. 5. Supply voltage Current consumption in active mode Current consumption in stand-by mode VCC IVCC IVCC IVCC Istby 4.5 59 59 57
Digital Part PLL Crystal oscillator connections XTAL 6. 7. 8. 9. Crystal frequency Crystal resistance Oscillation frequency Input impedance fXTAL RXTAL fXTAL ZXTAL ICPDH ICPH ICPDL ICPL ICPZ VCP ITH 1.0 3.2 4.0 30 4.8 300 MHz series resonance series resonance
3,9997 4,000 4,0002 MHz fXTAL = 4 MHz 5 5 -650 -500 fXTAL = 4 MHz VCP = 1.8 V VCP = 1.8 V VCP = 1.8 V VCP = 1.8 V T2, T1, T0 = 0,1,0, VCP = 2 V loop locked VTH = 33 V, OS = 1
Charge pump output CP 10. Output current, 11. see Table 15 Charge pump 12. current on page 49 13. 14. Tristate current 15. Output voltage 16. Leakage current 430 650 860 A 180 250 360 A 90 35 125 180 A 50 1 2.5 10 70 A nA V A
Tuning voltage output VT (open collector)
Specification
33
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol Limit Values min. 17. Output voltage VTL when the loop is closed, (test mode in normal operation) I2C-Bus Bus inputs SCL, SDA 18. High-level input voltage 19. Low-level input voltage 20. High-level input current 21. 22. Low-level input current 23. VIH VIL IIH IIH IIL IIL -10 2.3 0 5.5 1.5 10 10 10 V V A A A A Vbus = 5.5 V, VCC = 0 V Vbus = 5.5 V, VCC = 5.5 V Vbus = 1.5 V, VCC = 0 V Vbus = 0 V, VCC = 5.5 V VOH = 5.5 V IOL = 3 mA 0.4 typ. max. 32.7 V OS = 0, RLoad = 33 k, tuning supply = 33 V Unit Test Conditions
Bus output SDA (open collector) 24. Leakage current 25. Low-level output voltage Edge speed SCL,SDA 26. Rise time 27. Fall time Clock timing SCL 28. Frequency 29. High pulse width 30. Low pulse width Start condition 31. Set-up time tsusta 0.6 s fSCL tH tL 0 0.6 1.3 100 400 kHz s s tr tf 300 300 ns ns IOH VOL 10 0.4 A V
Specification
34
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol thsta tsusto tbuf tsudat thdat Vhys tsp 0 Limit Values min. 32. Hold time Stop condition 33. Set up time 34. Bus free Data transfer 35. Set-up time 36. Hold time 37. Input hysteresis SCL, SDA 38. Pulse width of spikes which are suppressed 0.1 0 200 50 s s mV ns 0.6 1.3 s s 0.6 typ. max. s Unit Test Conditions
39. Capacitive load for CL each bus line PNP port outputs P0, P1, P2, P3 (open collector) 40. Port output voltage VPOH0to3 41. Output saturation voltage port 0 42. Output saturation voltage port 1 43. Output saturation voltage ports 2, 3 VPL0 = VCC VCESat0 VPL1 = VCC VCESat1 VPL2 ,3 = VCC VCESat2,3 IPOH4 VPL04 0.25 0.05 0.25
400
pF
0.4 0.4
V V
IPOLH0to3 = 0 mA, port disabled IPOL0 = 10 mA, port enabled IPOL1 = 15 mA port enabled IPOL2, 3 = 5 mA port enabled
0.25
0.4
V
0.25
0.4
V
NPN port output P4 (open collector) 44. Output leakage current 45. Output saturation voltage ADC input 46. ADC input voltage VADC 0 5.5 V 10 0.4 A V VCC = 5.5, VPn4 = 6 V IPOL4 = 5 mA
Specification
35
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol IADCH IADCL -10 Limit Values min. 47. High-level input current 48. Low-level input current 49. High-level input current 50. Low-level input current Analog Part LOW band mixer mode (P0 = 1, P1 = 0, including IF amplifier) 51. RF frequency 52. Voltage gain 53. 54. Noise figure fRF GV GV NF 44.25 23.5 23.5 26 26 8 170.25 MHz picture carrier 1) 28.5 dB 28.5 dB 10 dB fRF = 44.25 MHz,
see 4.5.1 on page 55
Unit Test Conditions A A
typ.
max. 10
Address selection input AS IASH IASL -50 50 A A VASH = 5.5 V VASL = 0 V
fRF =170.25 MHz,
see 4.5.1 on page 55
fRF = 50 MHz,
see 4.5.4 on page 56 see 4.5.3 on page 56
55.
NF
8
10
dB
fRF =150 MHz,
see 4.5.4 on page 56 see 4.5.3 on page 56
56. Output voltage Vo causing 0.8% of 57. crossmodulation in Vo channel 58. Input IP2 IIP2
113 113 160
dBV fRF = 48.25 MHz,
see 4.5.6 on page 57
dBV fRF = 154.25 MHz,
see 4.5.6 on page 57
dBV fRF1 = 48.25 MHz fRF2 = 97.50 MHz, PRF1 = PRF2 dBV fRF1 = 154.25 MHz fRF2 = 309.50 MHz, PRF1 = PRF2
59.
IIP2
145
Specification
36
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol IIP3 Limit Values min. 60. Input IP3 typ. 118 max. dBV fRF1 = 48.25 MHz fRF2 = 49.25 MHz PRF1 = PRF2 dBV fRF1 = 154.25 MHz fRF2 = 155.25 MHz, PRF1 = PRF2 dBV fRF = 48.25 MHz dBV fRF = 154.25 MHz dBV fRF = 48.25 MHz 2) dBV fRF = 154.25 MHz 2.) 2.12 kHz fRF = 154.25 MHz 3) Unit Test Conditions
61.
IIP3
117
62. Output voltage Vo causing 63. Vo 1 dB compression 64. Output voltage 65. causing 1.1 kHz incidental FM Vo Vo 108 108
124 124 111 111
66. Local oscillator FM FMI2C caused by I2C communication 67. 750 Hz Pulling Vi 88 57 57 63 60 60 66 68. Channel S02 beat INTS02 69. Channel A-5 beat INTA-5
dBV fRF = 154.25 MHz 4) dBc dBc dBc 120 0.15 dBV mS PRF = 115 dBV at IF output 5) PRF = 115 dBV at IF output 6) PRF1 = PRF2 = 80 dBV7)
8)
70. Channel CH6 color INTCH6 beat 71. RF input level without lock-out Vi
72. Input conductance gp Yi = (gp + jCp) 73. Input capacitance Cp
fRF = 48.25 to 154.25 MHz,
see 4.4.1 on page 52
1
pF
fRF = 48.25 to 154.25 MHz,
see 4.4.1 on page 52
Mid band mixer mode (P0 = 0, P1 =1, including IF amplifier) 74. RF frequency fRF 154.25 454.25 MHz picture carrier 1.)
Specification
37
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol GV GV NF NF Limit Values min. 75. Voltage gain 76. 77. Noise figure (not corrected for 78. image) 33 33 typ. 36 36 6 6 112 112 146 max. 39 39 8 8 dB dB dB dB fRF = 161.25 MHz,
see 4.5.2 on page 55
Unit Test Conditions
fRF = 439.25 MHz,
see 4.5.2 on page 55
fRF = 161.25 MHz,
see 4.5.5 on page 57
fRF = 300 MHz,
see 4.5.5 on page 57
79. Output voltage Vo causing 0.8% of 80. crossmodulation in Vo channel 81. Input IP2 IIP2
dBV fRF = 161.25 MHz,
see 4.5.7 on page 58
dBV fRF = 439.25 MHz,
see 4.5.7 on page 58
dBV fRF1 = 161.25 MHz fRF2 = 323.50 MHz, PRF1 = PRF2 dBV fRF1 = 440.25 MHz fRF2 = 818.50 MHz, PRF1 = PRF2 dBV fRF1 = 161.25 MHz fRF2 = 162.25 MHz PRF1 = PRF2 dBV fRF1 = 439.25 MHz fRF2 = 440.25 MHz PRF1 = PRF2 dBV fRF = 161.25 MHz dBV fRF = 439.25 MHz dBV fRF = 161.25 MHz
2.)
82.
IIP2
140
83. Input IP3
IIP3
105
84.
IIP3
106
85. Output voltage Vo causing 86. Vo 1 dB compression 87. Output voltage causing 1.1 kHz 88. incidental FM Vo Vo 108 108
124 124 111 111
dBV fRF = 439.25 MHz
2.)
89. Local oscillator FM FMI2C caused by I2C communication
2.12 kHz
fRF 3.)
= 439.25 MHz
Specification
38
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol Limit Values min. 90. N+5 - 1 MHz pulling N+5 - 1 MHz 77 typ. 80 max. dBV fRFw = 359.25 MHz, fOSC = 398.15 MHz, fRFu = 399.25 MHz
9)
Unit Test Conditions
91. 750 Hz Pulling 92. RF input level without lock-out 93. Input impedance Zi = (Rs + jLs) 94. 95. 96.
Vi Vi Rs Rs Ls Ls
78 120 35 35 8 8
dBV fRF = 439.25 MHz
4.) 8.)
dBV nH nH
fRF = 161.25 MHz,
see 4.4.2 on page 52
fRF = 439.25 MHz,
see 4.4.2 on page 52
fRF = 161.25 MHz,
see 4.4.2 on page 52
fRF = 439.25 MHz,
see 4.4.2 on page 52
HIGH band mixer mode (P0 = 0, P1 = 0, including IF amplifier) 97. RF frequency 98. Voltage gain 99. fRF GV GV 399.25 33 33 36 36 863.25 MHz picture carrier 1.) 39 39 dB dB fRF = 447.25 MHz,
see 4.5.2 on page 55
fRF = 863.25 MHz,
see 4.5.2 on page 55
100. Noise figure (not corrected for 101. image)
NF NF
6 7 112 112 136
8 9
dB dB
fRF = 447.25 MHz,
see 4.5.5 on page 57
fRF = 863.25 MHz,
see 4.5.5 on page 57
102. Output voltage Vo causing 0.8% of 103. crossmodulation in Vo channel 104. Input IP2 IIP2
dBV fRF = 447.25 MHz,
see 4.5.7 on page 58
dBV fRF = 863.25 MHz,
see 4.5.7 on page 58
dBV fRF1 = 447.25 MHz fRF2 = 895.50 MHz PRF1 = PRF2
Specification
39
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol IIP3 Limit Values min. 105. Input IP3 typ. 106 max. dBV fRF1 = 447.25 MHz fRF2 = 448.25 MHz PRF1 = PRF2 dBV fRF1 = 863.25 MHz fRF2 = 864.25 MHz PRF1 = PRF2 dBV fRF = 447.25 MHz dBV fRF = 863.25 MHz dBV fRF = 447.25 MHz
2.)
Unit Test Conditions
106.
IIP3
106
107. Output voltage Vo causing 108. Vo 1 dB compression 109. Output voltage causing 1.1 kHz 110. incidental FM Vo Vo 108 108
124 124 111 111
dBV fRF = 454.25 MHz
2.)
111. Local oscillator FM FMI2C caused by I2C communication 112. N+5 - 1 MHz pulling N+5 - 1 MHz 77 80
2.12 kHz
fRF 3.)
= 863.25 MHz
dBV fRFw = 823.25 MHz, fOSC = 862.15 MHz, fRFu = 862.25 MHz
9.)
113. 750 Hz Pulling 114. RF input level without lock-out 115. Input impedance Zi = (Rs + jLs) 116. 117. 118.
Vi Vi Rs Rs Ls Ls
78 120 35 35 8 8
dBV fRF = 855.25 MHz
4.) 8.)
dBV nH nH
fRF = 407.25 MHz,
see 4.4.3 on page 53
fRF = 863.25 MHz,
see 4.4.3 on page 53
fRF = 407.25 MHz,
see 4.4.3 on page 53
fRF = 863.25 MHz,
see 4.4.3 on page 53
LOW band oscillator, (see Chapter 3 on page 27) 119. Oscillator frequency fOSC 80 210 MHz
10)
Specification
40
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol fOSC(V) fOSC(V) fOSC(T) Limit Values min. 120. Oscillator 121. frequency shift 122. Oscillator frequency drift 123. Oscillator frequency drift 124. Phase noise, carrier to noise sideband 125. typ. 20 110 300 500 max. 70 kHz kHz kHz VCC = 5% 11) VCC = 10% 11.) T = 25 C, with compensation
12)
Unit Test Conditions
fOSC(t) OSC 77 14)
150 85
250
kHz
5 s to 15 min after switch on 13)
dBc/ 1 kHz frequency Hz offset, worst case in frequency range dBc/ 10 kHz frequency Hz offset, worst case in frequency range dBc/ 100 kHz Hz frequency offset, worst case in frequency range mV 4.75 < VP < 5.25 V, worst case in frequency range, ripple frequency 500 kHz 16)
10.)
88 15)
92
126.
108
14), 15)
112
127. Ripple RSC susceptibility of VP
15
20
MID band oscillator, (see Chapter 3 on page 27) 128. Oscillator frequency 129. Oscillator 130. frequency shift 131. Oscillator frequency drift 132. Oscillator frequency drift fOSC fOSC(V) fOSC(V) fOSC(T) fOSC(t) 201 20 110 500 250 750 500 493 70 MHz kHz kHz kHz kHz
VCC = 5% 11.) VCC = 10% 11.) T = 25 C; with compensation 12.) 5 s to 15 min after switch on 13.)
Specification
41
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol OSC Limit Values min. 133. Phase noise, carrier to noise sideband 134. 73 14) typ. 80 max. dBc/ 1 kHz frequency Hz offset, worst case in frequency range dBc/ 10 kHz frequency Hz offset, worst case in frequency range dBc/ 100 kHz Hz frequency offset, worst case in frequency range mV 4.75 < VP < 5.25 V, worst case in frequency range, ripple frequency 500 kHz 14.)
10.)
Unit Test Conditions
88 15)
92
135.
106
14), 15)
112
136. Ripple RSC susceptibility of VP
15
20
HIGH band oscillator, (see Chapter 3 on page 27) 137. Oscillator frequency 138. Oscillator 139. frequency shift 140. Oscillator frequency drift 141. Oscillator frequency drift 142. Phase noise, carrier to noise sideband 143. fOSC fOSC(V) fOSC(V) fOSC(T) fOSC(t) OSC 70 14) 435 20 300 600 250 77 905 70 MHz kHz kHz 1000 kHz 500 kHz
VCC = 5% 11.) VCC = 10% 11.) T = 25 C; with compensation 12.) 5 s to 15 min after switch on 13).
dBc/ 1 kHz frequency Hz offset, worst case in frequency range dBc/ 10 kHz frequency Hz offset, worst case in frequency range dBc/ 100 kHz Hz frequency offset, worst case in frequency range
86 15)
90
144.
106
14), 15)
109
Specification
42
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol Limit Values min. 145. Ripple RSC susceptibility of VP 15 typ. 20 max. mV 4.75 < VP < 5.25 V, worst case in frequency range, ripple frequency 500 kHz 14.) at 36 MHz,
see 4.4.4 on page 53
Unit Test Conditions
IF amplifier 146. Input impedance Zi = (Rs + jLs) 147. 148. Output reflection coefficient 149. RS LS S22 S22 460 10 10 0.85 65 20 nH dB nH
at 36 MHz,
see 4.4.4 on page 53
magnitude,
see 4.4.4 on page 53
phase,
see 4.4.4 on page 53
150. Output impedance RS Zo = (Rs + jLs) 151. LS
at 36 MHz,
see 4.4.6 on page 54
at 36 MHz,
see 4.4.6 on page 54
Rejection at the IF outputs 152. Level of divider INTDIV interferences in the IF signal 153. Crystal oscillator interferences rejection INTXTAL 60 66 20 dBV
17)
, worst case
dBc
VIF = 100 dBV, worst case in frequency range18) VIF = 100 dBV, worst case in frequency range 19)
154. Reference INTREF frequency rejection AGC output 155. AGC take-over point 156. Source current 1 157. Source current 2 AGCTOP IAGCfast IAGCslow
60
66
dBc
112 7.2 210 80 9.0 300 100
dBV AL2, AL1, AL0 = 0, 1, 0 10.8 A 390 120 nA A
158. Peak sink to ground IAGCpeak
Specification
43
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference # Parameter Symbol Limit Values min. 159. AGC output voltage VAGCmax 160. AGC output voltage VAGCmin 161. RF voltage range to AGCSLIP switch the AGC from active to inactive mode 162. AGC output voltage AGCRML 163. AGC output voltage AGCRMH 0 3.3 3.8 3.6 0 typ. 3.8 max. 4.0 V maximum level, IAGC = 9 A minimum level Unit Test Conditions
0.25 V 0.5 dB
2.9
V
AGC bit high or AGC active AGC bit low or AGC inactive AL2, AL1, AL0 = 1,1,0 0 < VAGC < VCC AL2, AL1, AL0 = 1,1,1 AGC is disabled
VCC- V 0.5 or 4 50 nA
164. AGC leakage current
AGCLEAK
-50
165. AGC output voltage AGCOFF
3.3
3.8
VCC- V 0.5 or 4
This value is only guaranteed in lab.
1) The RF frequency range is defined by the oscillator frequency range and the intermediate frequency (IF). 2) This is the level of the RF unwanted signal (50% amplitude modulated with 1kHz) that causes a 1.1 kHz FM modulation of the local oscillator and thus of the wanted signal; Vwanted = 100 dBV; funwanted = fwanted + 5.5 MHz. 3) Local oscillator FM modulation resulting from I2C communication is measured at the IF output using a modulation analyser with a peak to peak detector ((P+ +P-)/2) and a post detection filter 30 Hz - 200 kHz. The I2C messages are sent to the tuner in such a way that the tuner is addressed but the content of the PLL registers are not altered. The refresh interval between each data set shall be 20 ms to 1s. 4) This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency deviation on the oscillator signal producing sidebands 30 dB below the level of the oscillator signal. 5) Channel S02 beat is the interfering product of fRFpix, fIF and fOSC of channel S02, fBEAT = 37.35 MHz. The possible mechanisms are fOSC - 2 x fIF or 2 x fRFpix - fOSC. 6) Channel A-5 beat is the interfering product of fRFpix, fIF and fOSC of channel A-5; fBEAT= 45.5 MHz. The possible mechanisms are: fOSC - 2 x fIF or 2 x fRFpix - fOSC. 7) Channel 6 beat is the interfering product of fRFpix + fRFsnd - fOSC of channel 6 at 42 MHz. 8) The IF output signal stays stable within the range of the fref step for a low level RF input up to 120 dBV. 9) N+5 -1 MHz is defined as the input level of channel N+5, at frequency 1 MHz lower, causing FM sidebands 30 dB below the wanted carrier.
Specification
44
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
10) Limits are related to the tank circuit used in the application board (see Chapter 3 on page 27). Frequency bands may be adjusted by the choice of external components. 11) The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free running during this measurement. 12) The frequency drift is defined as a change in oscillator frequency if the ambient temperature varies from TA = 25 to 50 C or from TA = 25 to 0 C. The oscillator is free running during this measurement. 13) The switch-on drift is defined as a change in oscillator frequency between 5 s and 15 min after switch-on. The oscillator is free running during this measurement. 14) see Figure 8 Application Circuit for DVB-T on page 28. 15) see Figure 7 Application Circuit for ATSC on page 27. 16) The supply ripple susceptibility is measured in the application board (see Chapter 3 on page 27), using a spectrum analyser connected to the IF output. An unmodulated RF signal is applied to the test board RF input. A sinewave signal with a frequency of 500 kHz is superposed onto the supply voltage (see 4.5.8 on page 58). The amplitude of this ripple is adjusted to bring the 500 kHz sidebands around the IF carrier to a level of 53.5 dBc referred to the carrier. 17) This is the level of divider interferences close to the IF frequency. For example channel S3: fOSC = 158.15 MHz, 1/4 fOSC = 39.5375 MHz. Divider interference is measured with the application board (see Chapter 3 on page 27). All ground pins are connected to a single ground plane under the IC. The LOWIN input must be left open (i.e. not connected to any load or cable). The MIDIN and HIGHIN inputs are connected to a hybrid. The measured level of divider interference are influenced by layout, grounding and port decoupling. The measurement results between various applications and the reference board could vary as much as 10 dB. 18) Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be greater than 60 dB for an IF output of 100 dBV. 19) The reference frequency rejection is the level of reference frequency sidebands (e.g. 62.5 kHz) related to the carrier. The rejection has to be greater than 60 dB for an IF output of 100 dBV.
Specification
45
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
4.2
Table 8 Name
Programming
Bit Allocation Read/Write Byte MSB bit6 bit5 0 N13 N5 T2 AL1 0 1 bit4 0 N12 N4 T1 P4 ATC 1 POR AL2 1 FL AL0 0 1 Bits bit3 0 N11 N3 T0 P3 0 0 AGC bit2 bit1 LSB A A A A A A A A Ack
Write Data Address Byte Divider Byte 1 Divider Byte 2 Control byte Auxiliary byte 1) Read data Address byte Status byte ADB SB MA1 MA0 R/W=1 A2 A1 A0 ADB DB1 DB2 CB AB 1 0 N7 1 1 N14 N6 CP MA1 MA0 R/W=0 N10 N2 P2 0 N9 N1 P1 0 N8 N0 OS P0 0
RSA RSB
Bandswitch byte BB
1) AB replaces BB when T2, T1, T0 = 0, 1, 1, see Table 11 Test modes on page 47.
Table 9 Symbol A MA0, MA1 N14 to N0 CP
Description of Symbols Description Acknowledge Address selection bits, see Table 10 Address selection on page 47 programmable divider bits: N = 214 x N14 + 213 x N13 + ... + 23 x N3 + 22 x N2 + 21 xN1 + N0 charge pump current bit: bit = 0: charge pump current = 50 A or 125 A bit = 1: charge pump current = 250 A (default) or 650 A, see Table 15 Charge pump current on page 49 test bits, see Table 11 Test modes on page 47 reference divider bits, see Table 12 Reference divider ratios on page 48 tuning amplifier control bit: bit = 0: enable VT; bit = 1: disable VT (default)
T0, T1, T2 RSA, RSB OS
P0, P1, P2, PNP ports control bits P3 bit = 0: Port is inactive, high impedance state (default) bit = 1: Port is active, VOUT= VCC-VCESAT
Specification 46 V 2.5, 2004-04-28
TUA6034, TUA6036
Reference P4 NPN port control bit bit = 0: Port is inactive, high impedance state (default) bit = 1: Port is active, VOUT= VCESAT AGC time constant bit bit = 0: IAGC=300 nA; t=2s with C=160 nF (default) bit = 1: IAGC=9 A; t=50ms with C=160 nF AGC take-over point bits, see Table 13 AGC take-over point on page 48 Power-on reset flag; POR =1 at power-on PLL lock flag; bit = 1: loop is locked internal AGC flag. AGC=1 when internal AGC is active (level below 3V)
ATC
AL0, AL1, AL2 POR FL AGC
A0, A1, A2 digital output of the 5-level ADC
Table 10
Address selection MA1 0 0 1 1 MA0 0 1 0 1
Voltage at AS (0 to 0.1) x VCC open circuit or (0.2 to 0.3) x VCC (0.4 to 0.6) x VCC (0.9 to 1) x VCC
Table 11 Mode
Test modes T2 0 0 0 0 1 1 1 1 T1 0 0 1 1 0 0 1 1 T0 0 1 0 1 0 1 0 1
Normal mode, charge pump currents 50 and 250 A selectable Normal mode, charge pump currents 50 and 250 A selectable(default) CP is in high-impedance state byte AB will follow (otherwise byte BB will follow) P0 = fdiv output, P1 = fref output not in use Extended mode, charge pump currents 50 and 250 A selectable Extended mode, charge pump currents 125 and 650 A selectable
Specification 47
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
Table 12
Reference divider ratios fref1) 50 kHz 31.25 kHz 166.67 kHz 62.5 kHz 125 kHz 142.86 kHz Mode normal normal x x extended extended T2 0 0 x x 1 1 T1 0 0 x x 1 1 RSA 0 0 1 1 0 0 RSB 0 1 0 1 0 1
Reference divider ratio 80 128 24 64 32 28
1) With a 4 MHz quartz.
Table 13
AGC take-over point AL2 0 0 default mode at POR 0 0 1 1 External AGC 1) Disabled 2) 1 1 AL1 0 0 1 1 0 0 1 1 AL0 0 1 0 1 0 1 0 1
IF output level, Remark symmetrical mode 115 dBV 115 dBV 112 dBV 109 dBV 106 dBV 103 dBV IAGC = 0 3.8 V
1) The AGC detector is disabled. Both the sinking and sourcing current from the IC is disabled. The AGC output goes into a high impedance state and an external AGC source can be connected in parallel and will not be influenced. 2) The AGC detector is disabled and IAGC = 9 A.
Specification
48
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference Table 14 A to D converter levels A2 0 0 0 0 1 A1 0 0 1 1 0 A0 0 1 0 1 0
Voltage at ADC (0 to 0.15) * VCC (0.15 to 0.3) * VCC (0.3 to 0.45) * VCC (0.45 to 0.6) * VCC (0.6 to 1) * VCC
1) No erratic codes in the transition.
Table 15
Charge pump current Mode normal CP 0 1 0 extended 0 1 1 1 1 0 0 T2 T1 T0 x1) x 0 1 0 1
Charge pump current 50 A 250 A (default) 50 A 125 A 250 A 650 A
1) x = don`t care.
Table 16 Band LOW MID
Internal band selection Mixer P0.P1 1) P1.P0 P0.P1 P0, P1 Oscillator P0.P1 P1.P0 P0.P1 P0, P1
HIGH (default) Stand-by mode
1) Means: (P0 AND NOT P1); that is: LOW mixer is switched on if (P0=1 and P1=0).
Specification
49
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
Table 17 Name Write Data Address Byte
Defaults at power-on reset Byte MSB ADB DB1 DB2 CB BB AB 1 0 x 1 0 0 bit6 1 x
1)
Bits bit5 0 x x 0 0 1 bit4 0 x x 0 0 0 bit3 0 x x 1 0 bit2 MA1 x x x 0 bit1 MA0 x x x 0 LSB R/W=0 x x 1 0
Divider byte 1 Divider byte 2 Control byte Bandswitch byte Auxiliary byte
1) x = don`t care.
x 1 0 0
Table 18 Mode normal
Description of modes Description Reference divider ratios 24, 64, 80, 128 selectable. Charge pump currents 50, 250 A selectable. Auxiliary byte to follow Control byte (T2=0, T1=1, T0=1), otherwise Bandswitch byte to follow Control byte. Reference divider ratios 24, 28, 32, 64 selectable. Charge pump currents 50, 125, 250, 650 A selectable. Auxiliary byte to follow Control byte (T2=0, T1=1, T0=1), otherwise Bandswitch byte to follow Control byte.
extended
Specification
50
V 2.5, 2004-04-28
4.3
Specification
Start Ack. 1st Ack. 2nd Ack. 3rd Ack. 4th Ack.
Stop
Addressing
1
1
M MA R/
I2C Bus Timing Diagram
Note:
SCL
51
Telegram examples:
Start= start condition ADB= address byte DB1= prog. divider byte 1 DB2= prog. divider byte 2 CB= Control byte BB= Bandswitch byte AB= Auxiliary byte Stop= stop condition
Abbreviations:
Start-ADB-DB1-DB2-CB-BB-Stop
Start-ADB-DB1-DB2-CB-AB-Stop
Start-ADB-CB-BB-DB1-DB2-Stop
Start-ADB-CB-AB-DB1-DB2-Stop
Start-ADB-DB1-DB2-Stop
Start-ADB-CB-BB-Stop
TUA6034, TUA6036
Reference
V 2.5, 2004-04-28
Start-ADB-CB-AB-Stop
TUA6034, TUA6036
Reference
4.4 4.4.1
Electrical Diagrams Input admittance (S11) of the LOW band mixer (40 to 150 MHz)
1
Y0 = 20mS
0.9
0.8
1.5
0.7
0.6
0.5
0.4
2 3
1.5 1 0.9 0.8 0.7 0.6 0.5 0.4
0.3
0.3
0.2
0.1
20
10
5
4
3
2
20
0.1 10
4
3
0.4
1.5
4.4.2
Z0 = 50
Input impedance (S11) of the MID band mixer (150 to 455 MHz)
0.8
0.7
0.9
1
1
0.9
0.8
0.6
1.5
0.7
0.6
0.5
2
0.5
2
3
0.3
4
5
455 MHz
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.5
150 MHz
10
0
20
20
2
3
4
0.3
0.4 0.5 2
0.6
0.7
0.8
0.9
Specification
52
1
1.5
5
0.2
10
0.1
5
0.2
5
10
20
0
4
0.3
3
0.4
4
0.2
0.2
5
0.1
10
0.1
20
150MHz
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
4.4.3
Z0 = 50
Input impedance (S11) of the HIGH band mixer (450 to 865 MHz)
0.8
0.7
0.9
1
0.6
1.5
0.5
2
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 0.9 1
1.5
10
0
20
0.2
2
3
4
5
0.3
0.4 0.5 2
0.6
0.7
0.8
0.9
4.4.4
Y0 = 20ms
Output admittance (S22) of the of the mixers (30 to 50 MHz)
1
1
0.9
0.8
1.5
0.7
1.5
0.6
0.5
2
0.4
0.3
1.5
1 0.9 0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
20
10
5
4
3
2
20
38.9 MHz
0.1
10
4
3
0.4
1.5
Specification
53
1
0.9
0.8
0.7
0.6
0.5
2
0.2
5
0
5
0.2
10
0.1
0.1
20
4
0.3
3
0.4 3
0.3
3
4
5
4
0.2
5
865 MHz 450 MHz
10
20
10
0.1
20
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
4.4.5
Z0 = 50
Input impedance (S11) of the IF amplifier (30 to 50 MHz)
0.8
0.9
1
0.7
0.6
1.5
0.5
2
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 0.9 1
1.5
10
0
20
2
3
4
5
38.9 MHz
0.1
0.3
0.4
0.5
0.6
0.7
0.8
0.9
4.4.6
Z0 = 50
Output impedance (S22) of the IF amplifier (30 to 50 MHz)
0.7
0.8
0.9
1
1
0.6
1.5
1.5
0.5
2
2
3
0.3
4
5
38.9 MHz
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.5 10 0 20 2 3 4 5
0.3
0.4
0.5
0.6
0.7
0.8
0.9
Specification
54
1
1.5
2
5
0.2
10
0.1
20
5
0.2
4
10
20
10
4
3
3
0.4
3
0.4
0.3
0.2
4
5
10
20
0.2
0.1
0.1
20
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
4.5 4.5.1
Measurement Circuits Gain (GV) measurement in LOW band
LOWIN IFOUT 50 Vmeas RMS Voltmeter
Transformer N1 V0 C N2 V'meas 50 spectrum analyser
V
50
Vi
Device under Test
IFOUT
N1 : N2 = 10 : 2 turns
Figure 10
* * * *
Gain (GV) measurement in LOW band
Zi >> 50 => Vi = 2 x Vmeas = 80 dBV Vi = Vmeas + 6dB = 80 dBV V0 = V'meas + 16 dB (transformer ratio N1:N2 and transformer loss) Gv = 20 log(V0 / Vi)
4.5.2
Gain (GV) measurement in MID and HIGH bands
50 Vmeas RMS Voltmeter
MIDIN IFOUT HIGHIN
Transformer N1 V0 C V'meas N2 50 spectrum analyser
V
50
Vi
Balun 1:1
Device under Test
MIDIN IFOUT HIGHIN
N1 : N2 = 10 : 2 turns
Figure 11
* * *
Gain (GV) measurement in MID and HIGH bands
Vi = Vmeas = 70 dBV V0 = V'meas + 16 dB (transformer ratio N1:N2 and transformer loss Gv = 20 log(V0 / Vi) + 1 dB (1 dB = insertion loss of balun)
Specification
55
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
4.5.3
Matching circuit for optimum noise figure in LOW band
15p 22p In 1n In Out 7 turns wire 0.5 mm coil 5.5 mm
1n Out
22p
50 semi rigid cable 300 mm long 96 pF/m 33dB/100m
22p
Figure 12
loss = 0 dB
Matching circuit for optimum noise figure in LOW band
For fRF = 150 MHz loss = 1.3 dB image suppression = 13 dB
For fRF = 50 MHz image suppression = 16 dB
4.5.4
Noise figure (NF) measurement in LOW band
Noise Source
IN
OUT
LOWIN IFOUT
Transformer N1 C N2
Matching Circuit
Device under Test
IFOUT
Noise Figure Meter
N1 : N2 = 10 : 2 turns NF = NFmeas - loss of matching circuit (dB)
Figure 13
Noise figure (NF) measurement in LOW band
Specification
56
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
4.5.5
Noise figure (NF) measurement in MID and HIGH bands
Noise Source
MIDIN IFOUT HIGHIN
Transformer N1 C N2
Balun 1:1
Device under Test
MIDIN IFOUT HIGHIN
Noise Figure Meter
N1 : N2 = 10 : 2 turns loss of balun = 1 dB NF = NFmeas - loss of balun (dB)
Figure 14
Noise figure (NF) measurement in MID and HIGH bands
4.5.6
Cross modulation measurement in LOW band
Vmeas RMS Voltmeter unwanted signal source AM = 80 %, 1 kHz A 50 C
V
50
LOWIN IFOUT
Transformer N1 V0 C N2
18 dB attenuator 38.9 MHz
Hybrid
50 B wanted signal source D 50
Vi
Device under Test
IFOUT
V
V'meas RMS Votmeter
50 modulation analyser
N1 : N2 = 10 : 2 turns
Figure 15
* * * *
Cross modulation measurement in LOW band
Zi >> 50 => Vi = 2 x Vmeas V'meas = V0 - 16 dB (transformer ratio N1:N2 and transformer loss) wanted output signal at fpix, Vo = 100 dBV unwanted output signal at fsnd
Specification
57
V 2.5, 2004-04-28
TUA6034, TUA6036
Reference
4.5.7
Cross modulation measurement in MID and HIGH bands
Vmeas RMS Voltmeter
V
50
unwanted signal source AM = 80 %, 1 kHz A 50 C
MIDIN IFOUT HIGHIN Vi
Transformer N1 V0 C N2
18 dB attenuator 38.9 MHz
Hybrid
50 B wanted signal source D 50
Balun 1:1
Device under Test
MIDIN HIGHIN IFOUT
V
V'meas RMS Votmeter
50 modulation analyser
N1 : N2 = 10 : 2 turns
Figure 16
* * *
Cross modulation measurement in MID and HIGH bands
V'meas = V0 - 16 dB (transformer ratio N1:N2 and transformer loss) wanted output signal at fpix, Vo = 100 dBV unwanted output signal at fsnd
4.5.8
Ripple susceptibility measurement
Vsupply
10 F 6k8 50 BC847B 10 F 500 kHz sine Vripple 50 VCC + V ripple to application board
Circuit to superimpose a 500 kHz ripple on VCC
Figure 17
Ripple susceptibility measurement
Specification
58
V 2.5, 2004-04-28
TUA6034, TUA6036
Package Outlines
5
5.1
Package Outlines
TSSOP-38
Figure 18
TSSOP-38 Vignette
Figure 19
TSSOP-38 Outline Drawing
Specification
59
V 2.5, 2004-04-28
TUA6034, TUA6036
Package Outlines
5.2
VQFN-48
Figure 20
VQFN-48 Vignette
Figure 21
VQFN-48 Outline Drawing
You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. SMD = Surface Mounted Device Specification 60 Dimensions in mm V 2.5, 2004-04-28
www.infineon.com
Published by Infineon Technologies AG

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